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10.4.4
PCC0 Card Status Change Interrupt Enable Register (PCC0CSCIER)
Bit
7
Bit Name
P0CRE
Initial Value
0
R/W
R/W
The PCC0 card status change interrupt enable register (PCC0CSCIER) is an 8-bit READ and
WRITE register. PCC0CSCIER is capable of setting a valid or invalid interrupt for each interrupt
factor of the PC card connected to PCC0. When register PCC0CSCIER is set to 1, the interrupt is
valid, and invalid when the register is set to 0. PCC0CSCR can be initialized by power-up reset.
PCC0CSCIER is initialized at power-up reset, and holds its value at software reset or in software-
based STANDBY mode.
Bit
Description
7
PCC0 Change Reset Enable (P0CRE)
If this bit is high: The general control register (PCC0GCR) and software control register
(PCC0SCR) in the PCC0 are initialized when a PC card connection change is detected in
PCC0.
If this bit is low: The general control register (PCC0GCR) and software control register
(PCC0SCR) in the PCC0 are not initialized even when a PC card change is detected in
PCC0. (Initial value)
6, 5
PCC0 Interrupt Request Enable 1 (P0IREQE1)
PCC0 Interrupt Request Enable 0 (P0IREQE0)
00: Any kind of IREQ interrupt request signal is not accepted for the PC card connected to
PCC0. Bit 5 in the status change register (PCC0CSCR) functions as a READ-only bit,
and can indicate the status of the inversion signal of the IREQ pin. (Initial value)
01: The level-mode IREQ interrupt request signal is accepted for the PC card connected
to PCC0. In the level mode, an interrupt occurs when level 0 of the signal input from
the IREQ pin is detected.
10: The pulse-mode IREQ interrupt request signal is accepted for the PC card connected
to PCC0. In the pulse mode, an interrupt occurs when a falling edge from 1 to 0 of the
signal input from the IREQ pin is detected.
11: The pulse-mode IREQ interrupt request signal is accepted for the PC card connected
to PCC0. In the pulse mode, an interrupt occurs when a rising edge from 0 to 1 of the
signal input from the IREQ pin is detected.
4
PCC0 STSCHG Change Interrupt Enable (P0SCE)
If this bit is high: An interrupt occurs for the PC card connected to PCC0 when the value of
the PCC0BVD1 pin (STSCHG) is changed from 1 to 0.
If this bit is low: No interrupt occurs for the PC card connected to PCC0 regardless of the
value of the PCC0BVD1 pin. (STSCHG) (Initial value)
Rev. 3.0, 03/01, page 116 of 390
6
5
4
P0SCE
P0IREQE1 P0IREQE0
0
0
0
R/W
R/W
R/W
3
2
1
P0CDE
P0RE
P0BWE
0
0
0
R/W
R/W
R/W
0
P0BDE
0
R/W
Default
0
0
0
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