Hitachi HD64465 User Manual page 308

Windows ce intelligent peripheral controller
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Interrupt Processing
Interrupts are the communication method for HC-initiated communication with the Host Controller
Driver. There are several events which may trigger an interrupt from the Host Controller. Each
specific event sets a specific bit in the HcInterruptStatus register. The Host Controller requests an
interrupt when all three of the following conditions are met:
• The MasterInterruptEnable bit in HcControl is set to '1'
• A bit in HcInterruptStatus is set to '1'
• The corresponding enable bit in HcInterruptEnable for the HcInterruptStatus bit is set to '1'.
If the Host Controller supports an SMI pin, the interrupts caused by most events are routable,
based on the value of the InterruptRouting bit of the HcControl register, to either the INT pin or
the SMI pin. Enabled interrupt events causes an interrupt to be signaled on the INT pin when the
InterruptRouting bit is a '0' and signaled on the SMI pin if the InterruptRouting bit is a '1.'
However, OpenHCI Host Controllers are not required to implement an SMI pin. If a Host
Controller does not implement an SMI pin and the InterruptRouting bit is a '1,' interrupts are not
generated. The notable exception for interrupt routing is the OwnershipChange event which is
always routed to the SMI pin.
Each of the following subsections describes a specific event, and therefore a specific bit,
represented in the HcInterruptStatus registe.
SchedulingOverrun Event
When a scheduling overrun occurs, the Host Controller sets the SchedulingOverrun bit following
the completion of the next HccaFrameNumber update. A scheduling overrun occurs when the
Host Controller determines that the Periodic list for the current frame cannot be completed before
the end of the frame.
WritebackDoneHead Event
Periodically, the Host Controller is required to update HccaDoneHead with the value of the
HcDoneHead register (see Section 17.2.2.2.3.1.8). When the write of HcDoneHead to
HccaDoneHead completes, the Host Controller sets the WritebackDoneHead bit. The
corresponding interrupt (if enabled) will inform the Host Controller Driver that it must service the
Done Queue.
StartOfFrame Event
When FrameRemaining is loaded with FrameInterval, the Host Controller sets the
StartOfFrame bit following completion of the next HccaFrameNumber update. This
corresponds to a frame boundary. The Host Controller Driver will normally disable this event,
enabling the event when it requires a deterministic interrupt at a frame boundary.
Rev. 3.0, 03/01, page 289 of 390

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