Ac97 Rx Controller; Miscellaneous Function Block; Data Structure Of Memory In Dma Mode; Figure 14.2 Data Transfer Scheme In Dma Tx Mode - Hitachi HD64465 User Manual

DMA transfer only supports PCML (slot3) and PCMR (slot4) at the same time. Sound data must
be prepared as stereo sound data. Only PCML (slot3) register is used for stereo data transfer with
automatic register switching.
14.3.6

AC97 RX Controller

This module, as shown in Fig14-5, contains several RX FIFOs, a SLOTREQ register, a 20-bit
buffer, a serial-to-parallel shift register and an inferred control circuit. Each RX FIFO has 4 20-bit
entries and is divided into two blocks. The operation mechanism is analogous to CSxx RX
controller.
DMA transfer only supports PCML (slot3) and PCMR (slot4) at the same time. Sound data will be
saved as stereo sound data. Only PCML (slot3) register is used for stereo data transfer with
automatic register switching.
14.3.7

Miscellaneous Function Block

This module controls many miscellaneous signals, including output pad enable, input pad enable,
serial SYNC, power down signal and reset signal.
14.3.8

Data Structure of Memory in DMA Mode

PCML 1st Data
PCMR 1st Data
PCML 2nd Data
PCMR 2nd Data
•
•
•
•
•
Memory

Figure 14.2 Data Transfer Scheme in DMA TX Mode

Target Address:
PCML
Hardware interleavingly
put data into PCML and
PCMR TX FIFO.
Rev. 3.0, 03/01, page 219 of 390
PCML TX FIFO
PCMR TX FIFO