Table 18.35 Hcdonehead Register; Table 18.36 Hcfminterval Register - Hitachi HD64465 User Manual

HcDoneHead

Table 18.35 HcDoneHead Register

Register: HcDoneHead
Bits Reset
31 - 4 0h
3 - 0 0h
HcFmInterval

Table 18.36 HcFmInterval Register

Register: HcFmInterval
Bits Reset
31
30 - 16
15 - 14 0h
13 - 0 2EDFh
Offset: 30-33
R/W Description
R/W DoneHead
Pointer to the current Done List Head ED. (Within SRAM
memory space)
- Reserved. Read/Write 0's
Offset: 34-37
R/W Description
FrameIntervalToggle
This bit is toggled by HCD whenever it loads a new value into
FrameInterval.
FSLargestDataPacket
This field specifies a value which is loaded into the Largest
Data Packet Counter at the beginning of each frame.
- Reserved. Read/Write 0's
R/W FrameInterval
This field specifies the length of a frame as (bit times - 1). For
12,000 bit times in a frame, a value of 11,999 is stored here.
Rev. 3.0, 03/01, page 325 of 390