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AC97 RX FIFO Interrupt Enable Register (ARIER) [cont'd]
Bit
Description
20
PCML RX FIFO REQUEST Interrupt Enable (PLRFRQIE):
When this bit is set to 1, PCML RX FIFO Request Interrupt is enabled.
When this bit is reset to 0, PCML RX FIFO Request Interrupt is disabled.
19
PCMR RX FIFO REQUEST Interrupt Enable (PRRFRQIE):
When this bit is set to 1, PCMR RX FIFO Request Interrupt is enabled.
When this bit is reset to 0, PCMR RX FIFO Request Interrupt is disabled.
18
Line 1 RX FIFO REQUEST Interrupt Enable (L1RFRQIE):
When this bit is set to 1, Line 1 RX FIFO Request Interrupt is enabled.
When this bit is reset to 0, Line 1 RX FIFO Request Interrupt is disabled.
MIC RX FIFO REQUEST Interrupt Enable (MICRFRQIE):
17
When this bit is set to 1, MIC RX FIFO Request Interrupt is enabled.
When this bit is reset to 0, MIC RX FIFO Request Interrupt is disabled.
Line2 RX FIFO REQUEST Interrupt Enable (L2RFRQIE):
16
When this bit is set to 1, Line 2 RX FIFO Request Interrupt is enabled.
When this bit is reset to 0, Line 2 RX FIFO Request Interrupt is disabled.
15
HSET RX FIFO REQUEST Interrupt Enable (HTRFRQIE):
When this bit is set to 1, HSET RX FIFO Request Interrupt is enabled.
When this bit is reset to 0, HSET RX FIFO Request Interrupt is disabled.
14
IO CTRL/STA RX FIFO REQUEST Interrupt Enable (IOCSRFRQIE):
When this bit is set to 1, IO CTRL/STA RX FIFO Request Interrupt is enabled.
When this bit is reset to 0, IO CTRL/STA RX FIFO Request Interrupt is disabled.
13
PCML RX FIFO OVERRUN Interrupt Enable (PLRFOVIE):
When this bit is set to 1, PCML RX FIFO OVERRUN Interrupt is enabled.
When this bit is reset to 0, PCML RX FIFO OVERRUN Interrupt is disabled.
12
PCMR RX FIFO OVERRUN Interrupt Enable (PRRFOVIE):
When this bit is set to 1, PCMR RX FIFO OVERRUN Interrupt is enabled.
When this bit is reset to 0, PCMR RX FIFO OVERRUN Interrupt is disabled.
11
Line 1 RX FIFO OVERRUN Interrupt Enable (L1RFOVIE):
When this bit is set to 1, Line 1 RX FIFO OVERRUN Interrupt is enabled.
When this bit is reset to 0, Line 1 RX FIFO OVERRUN Interrupt is disabled.
10
MIC RX FIFO OVERRUN Interrupt Enable (MICRFOVIE):
When this bit is set to 1, MIC RX FIFO OVERRUN Interrupt is enabled.
When this bit is reset to 0, MIC RX FIFO OVERRUN Interrupt is disabled.
9
Line2 RX FIFO OVERRUN Interrupt Enable (L2RFOVIE):
When this bit is set to 1, Line 2 RX FIFO OVERRUN Interrupt is enabled.
When this bit is reset to 0, Line 2 RX FIFO OVERRUN Interrupt is disabled.
Rev. 3.0, 03/01, page 209 of 390
Default
0
0
0
0
0
0
0
0
0
0
0
0
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