Hset Data Register (Hset) - Hitachi HD64465 User Manual

14.2.16 HSET Data Register (HSET)

HSET, a 32-bit Read/Write register, is a channel via which the system can write HSET DAC data
to CODEC or read HSET ADC data from CODEC. Bits 31-20 are reserved. The other bits are
initialized to 0 at reset. HSET is not initialized in STANDBY mode.
Bit 31
Bit Name -
Initial Value -
R/W -
Bit 23
Bit Name -
Initial Value -
R/W -
Bit 15
Bit Name D15
Initial Value 0
R/W R/W
Bit 7
Bit Name D7
Initial Value 0
R/W R/W
Bit Description
31 - 20 Reserved
19 - 0 Data 19-0 (D19-0): When this register is written, these bits will be written to the first empty
entry of HSET TX FIFO and then be transmitted to the connected CODEC.
When this register is read, the first non-empty entry of HSET RX FIFO will be read. HSET
RX FIFO stores HSET ADC data from the connected CODEC.
Rev. 3.0, 03/01, page 200 of 390
30 29 28
- - -
- - -
- - -
22 21 20
- - -
- - -
- - -
14 13 12
D14 D13 D12
0 0 0
R/W R/W R/W
6 5 4
D6 D5 D4
0 0 0
R/W R/W R/W
27 26 25
- - -
- - -
- - -
19 18 17
D19 D18 D17
0 0 0
R/W R/W R/W
11 10 9
D11 D10 D9
0 0 0
R/W R/W R/W
3 2 1
D3 D2 D1
0 0 0
R/W R/W R/W
24
-
-
-
16
D16
0
R/W
8
D8
0
R/W
0
D0
0
R/W
Default
-
0