Example Of Initialization And Programming Procedure For Hp-Sir - Hitachi HD64465 User Manual

T6: Post Frame Phase:
(1) DMA request continues until all the received data in the FIFO have been transferred. Two
more bytes in the following format will be stored in Rx FIFO and transmitted to the host
receive buffer:
First byte: 7 - 0, Byte count 7 to 0
Second byte: 7 - Abort
(2) DMA de-activates.
(3) Rx Ring Frame Pointer is updated pointing to the second byte above that has been
successfully stored in the host Rx buffer.
(4) If DMA is not used, the last two bytes will not be stored in the FIFO. The status bit EOF
will be set at the last Frame Check byte received.
(5) Repeat steps T2 through T6 if receiving continuous frame is required.
(6) The host reads IRSR to check for receive completion status.
11.5

Example of Initialization and Programming Procedure for HP-SIR

1. Enable HP-SIR:
For HP-SIR, SHARP-ASK and 4M mode FIR (use 48 MHz clock):
(1) Set BKSEL[4:0] to select Bank 2 register. (Set 02h to IMSTCR)
(2) Set IRMOD[3:0] in IIRC1R to select HP-SIR mode. (Set 00h to IIRC1R)
(3) Set SIRMOD in ISIRR to select FIR MODEM. (Set 00h to ISIRR)
For HP-SIR only (use 1.8432MHz clock):
(1) Set SIRMOD in ISIRR to select HP-SIR MODEM. (Set 01h to ISIRR)
2. Set UART portion of FIR module baud rate
(1) Set DLAB (Set 87h to IrLCR)
(2) Set baud rate to 115.2K (Set 01h to IrDLL and 00h to IrDLM)
3. Enable Interrupt
(1) Set DLAB = 0 (Set 07h to IrLCR)
(2) Enable transmitting data interrupt (Set 02h to IrIER)
(3) Enable modem interrupts (Set 08h to IrMCR)
4. Fill data into UART
Write data to IrTBR. (Set aah to IrTBR)
5. Observe the waveform on the pin (TXD) and IRQ0#
Rev. 3.0, 03/01, page 156 of 390
6 - Frame Error
5 - Overrun
4 to 0 - Byte Count 1