Spp And Epp Modes; Table 13.3 Status Port Register Description; Table 13.4 Control Port Register Description - Hitachi HD64465 User Manual

13.3.1

SPP and EPP Modes

(1) Data Port Register
This is a bi-directional 8-bit data register. The direction of data flow is determined by bit 5 of the
control register. It forwards directions when the bit is low and reverses when the bit is high.
(2) Status Port Register

Table 13.3 Status Port Register Description

Bit Description
7 BUSY#: Inverse of printer BUSY signal. A logic "0" means that the printer is busy and
cannot accept another character. A logic "1" means that the printer is ready to accept
another character.
6 ACK#: Printer acknowledge. A logic "0" means that the printer has received a character
and is ready to accept another. A logic "1" means that it is still processing the last
character.
5 PE: Paper end, a logic "1" indicates a paper end.
4 SLCT: Printer selected, a logic "1" means that the printer is on line.
3 ERR#: Printer error, a logic "0" means that an error has been detected.
2, 1 Reserved: These bits are always "1" when read.
0 TMOUT: This bit is valid only in EPP mode and indicates that a 10 ms time out has
occurred in EPP operation. If in other mode, this bit is always logic "1" when read.
(3) Control Port Register
This register provides all output signals to control the printer. The register can be read and written.

Table 13.4 Control Port Register Description

Bit Description
7, 6 Reserved: These bits are always "1" when read.
5 PDDIR: Data register direction control.
4 IRQE: Interrupt request enable
3 SLIN: Inverse of SLIN# pin. Set this bit to "1" to select the printer.
2 INIT: Initiate printer
1 AFD: Inverse of the AFD# pin.
0 STB: Inverse of the STB# pin. This pin controls the data strobe signal to printer.
(4) EPP Address Port Register
The EPP Address Port is only available in EPP mode. When the host writes to this port, the
contents of D0 - D7 are buffered and output to PD0 - PD7 as an EPP Address Write cycle. When
the host reads from this port, the contents of PD0 - PD7 are read as an EPP Address Read cycle.
Rev. 3.0, 03/01, page 173 of 390
Default
-
-
-
-
-
11
-
Default
11
0
0
0
0
0
0