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Table 20.8 Parallel Port AC Timing Spec. (unit : ns)
Symbol
Parameter
t
Delay from ACK# asserted to IRQ0# asserted
PPIRQD1
t
Delay from ACK# deasserted to IRQ0# deasserted
PPIRQD2
t
SLIN# deassert to BUSY asserted (EPP write
PPSLIND1
address cycle)
t
AFD# deassert to BUSY asserted (EPP write data
PPSLIND1
cycle)
t
SLIN # deassert to BUSY asserted (EPP read data
PPSLIND2
cycle)
t
AFD# deassert to BUSY asserted (EPP read data
PPSLIND2
cycle)
t
STB# asserted to BUSY deasserted (forward)
PPSTBD1
t
STB# deasserted to BUSY asserted (forward)
PPSTBD2
t
AFD# asserted to BUSY asserted (backward)
PPAFDD1
t
AFD# deasserted to ACK# deasserted (backward)
PPAFDD2
Table 20.9 SCDI AC Timing Spec. (unit : ns)
Symbol
Parameter
t
ACRST# Active Low Pulse Width
RST_LOW
t
SIBSYNC Active HIGH Pulse Width
SYN_HIGH
t
SIBSYNC Delay Time 1
SYNCD1
t
SIBSYNC Delay Time 2
SYNCD2
t
SIBDOUT Delay Time
SDOUTD
t
DREQ1# Delay Time 1
DREQ1D1
t
DREQ1# Delay Time 2
DREQ1D2
t
SIBDIN Setup Time
SDINSU
t
SIBDIN Hold Time
SDINHD
Min.
Max
Comment
-
100
Figure 20.13
-
100
Figure 20.13
65
460
Figure 20.14
65
460
Figure 20.14
65
460
Figure 20.15
65
460
Figure 20.15
-
750
Figure 20.16
-
900
Figure 20.16
-
1100
Figure 20.17
-
800
Figure 20.17
Min.
Max
Comment
1000
-
Figure 20.19
1000
-
Figure 20.20
-
15
Figure 20.21
-
15
Figure 20.21
-
15
Figure 20.21
-
15
Figure 20.18
-
15
Figure 20.18
10
-
Figure 20.21
10
-
Figure 20.21
Rev. 3.0, 03/01, page 351 of 390
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