Hitachi HD64465 User Manual page 14

Tables
Table 4-1. HD64465BP Signal Names (by pin numbers in alphabetical order) ..........................15
Table 4-2. HD64465BQ Signal Names (by pin numbers in alphabetical order)..........................20
Table 4-3. Pin Descriptions of Test Mode Select.........................................................................25
Table 4-4. Pin Descriptions of CPU Interface..............................................................................25
Table 4-5. Pin Descriptions of PCMCIA 0 Interface ...................................................................27
Table 4-6. Pin Descriptions of PCMCIA 1 Interface ...................................................................29
Table 4-7. Pin Descriptions of UART 0.......................................................................................31
Table 4-8. Pin Description of IrDA..............................................................................................31
Table 4-9. Pin Descriptions of Printer Port Interface ...................................................................32
Table 4-10. Pin Descriptions of AFE Interface............................................................................33
Table 4-11. Pin Descriptions of CODEC Interface ......................................................................34
Table 4-12. Pin Descriptions of USB Interface............................................................................34
Table 4-13. Pin Descriptions of Keyboard Interface....................................................................35
Table 4-14. Pin Descriptions of IO Port A...................................................................................35
Table 4-15. Pin Description of IO Port B.....................................................................................36
Table 4-16. Pin Descriptions of IO Port C ...................................................................................36
Table 4-17. Pin Descriptions of IO Port D...................................................................................37
Table 4-18. Pin Descriptions of IO Port E ...................................................................................37
Table 4-19. Pin Descriptions of 10-bit ADC Interface.................................................................37
Table 4-20. Pin Descriptions of PS/2 Interface............................................................................38
Table 4-21. Pin Descriptions of System Reset Interface..............................................................38
Table 4-22. Pin Descriptions of Crystal Interface........................................................................38
Table 4-23. Pin Description of Miscellaneous Interface ..............................................................38
Table 4-24. Pin Descriptions of LCD Interface ...........................................................................39
Table 4-25. Pin Descriptions of Power/Ground ...........................................................................39
Table 6-1. The Register List of Power Management and System Configuration.........................52
Table 7-1. The List of I/O Port Pin Function Configurations ......................................................67
Table 7-2. The List of Register Configurations ...........................................................................69
Table 7-3. Control Bits Definition of the Port x Control Register
and Its Relevant READ/WRITE Operation of Port Data Register .........................73
Table 9-1. The Register List of Timer Module ............................................................................91
Table 10-1. PC Card Controller Registers....................................................................................109
Table 11-1. Summary of FIR Controller Registers ......................................................................133
Table 12-1. Serial Channel Registers...........................................................................................158
Table 12-2. Interrupt Identification Register................................................................................160
Table 12-3. Baud Rates Using (9.216MHz/5) Clock ...................................................................162
Table 12-4. Modem Control Register Bits ...................................................................................163
Table 12-5. Line Status Register Bits...........................................................................................165
Table 12-6. Modem Status Register Bits......................................................................................166
Table 12-7. Reset Control of Register and Pinout Signals...........................................................167
Table 13-1. The Register List of Parallel Port..............................................................................172
Table 13-2. Bit Map of the EPP Registers ...................................................................................172
Rev. 3.0, 03/01, page viii of xiii