Table of Contents
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Revisions and Additions in this Edition
Page
Item
-
Description of register address
-
Description of HD64465BQ
-
HD64465BP Specifications
Changed
16
Table 4.1 HD64465BP Signal
Names (by pin numbers in
17
alphabetical order)
26
Table 4.4 Pin Descriptions of
CPU Interface
39
Table 4.24 Pin Descriptions of
No Connected Pins
Table 4.25 Pin Descriptions of
Power/Ground
52
6.3 Register Dexcription
Table 6.1 The Register List Of
Power Management and System
Configuration
Description
<Former Edition> 0x......... / .........h
<This Edition> H'.........
Add the description of new product "HD64465BQ"
<Former Edition>
PLL used in bypass mode and 48 MHz clock input into
UCK terminal
<This Edition>
PLL used in bypass mode
Add the description of M12 to M15 pins
Add the description of N12 to N15, P12 to P15, R12 to
R15 pins
Signal name of R1 pin
<Former Edition>
RESET#
<This Edition>
RESETPI#
Correct the table name
<Former Edition>
Pin Descriptions of LCD Interface
<This Edition>
Pin Descriptions of No Connected Pins
Pin description of AVSS3
<Former Edition>
Ground for analog circuit (can not connected)
<This Edition>
NC (No Connected Pin)
<Former Edition>
Register Size = 2
Access Size = 2
<This Edition>
Register Size = 16
Access Size = 16
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