Table 18.29 Hchcca Register; Table 18.30 Hcperiodcurrented Register; Table 18.31 Hccontrolheaded - Hitachi HD64465 User Manual

HcHCCA

Table 18.29 HcHCCA Register

Register: HcHCCA
Bits Reset
31 - 8 0h
7 - 0 0h
HcPeriodCurrntED

Table 18.30 HcPeriodCurrentED Register

Register: HcPeriodCurrentED
Bits Reset
31 - 4 0h
3 - 0 0h
HcControlHeadED

Table 18.31 HcControlHeadED

Register: HcControlHeadED
Bits Reset
31 - 4 0h
3 - 0 0h
Offset: 18-1B
R/W Description
R/W HCCA
Pointer to HCCA base address. (Within SRAM memory space)
- Reserved. Read/Write 0's
Offset: 1C-1F
R/W Description
R/W PeriodCurrentED
Pointer to the current Periodic List ED. (Within SRAM memory
space)
- Reserved. Read/Write 0's
Offset: 20-23
R/W Description
R/W ControlHeadED
Pointer to the Control List Head ED. (Within SRAM memory
space)
- Reserved. Read/Write 0's
Rev. 3.0, 03/01, page 323 of 390