Divider; Figure 15.2 Divider Configuration - Hitachi HD64465 User Manual

Data Receive with Register
When data are received in RXDR, the received data are stored in RXDR.
When data are stored in RXDR, RDFI is output. A receive data error interrupt is output when the
next data are received in the receive data full status.
When Both Receive Data Buffers Are Full
If both receive data buffers become full, the RDF bit must be cleared (clearing to 0 after reading 1)
twice in the same way as described in section 15.1.3.1.3 on the last page. (However, since both
receive data buffers are initially empty, it can be considered erroneous occurrences if they are
simultaneously full.)
15.4

Divider

In the divider, division ratio can be selected among 1/8, 1/7, and 1/6 via the Div1 and the Div2 bits
in CTR (see figure 15-2 below).
AFECK
AFECKE

Figure 15.2 Divider Configuration

Div1,2
M=1/8
M=1/7
M=1/6
Rev. 3.0, 03/01, page 239 of 390
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