Table 7-3. Control Bits Definition Of The Port X Control Register And Its Relevant Read/Write Operation Of Port Data Register - Hitachi HD64465 User Manual

GPDCR -- Address: H'10004006
Bit 15
Bit Name PD7MD1 PD7MD0 PD6MD1 PD6MD0 PD5MD1 PD5MD0 PD4MD1 PD4MD0
Initial Value 1
R/W R/W
Bit 7
Bit Name PD3MD1 PD3MD0 PD2MD1 PD2MD0 PD1MD1 PD1MD0 PD0MD1 PB0MD0
Initial Value 1
R/W R/W
GPECR -- Address: H'10004008
Bit 15
Bit Name PE7MD1 PE7MD0 PE6MD1 PE6MD0 PE5MD1 PE5MD0 PE4MD1 PE4MD0
Initial Value 1
R/W R/W
Bit 7
Bit Name PE3MD1 PE3MD0 PE2MD1 PE2MD0 PE1MD1 PE1MD0 PE0MD1 PE0MD0
Initial Value 1
R/W R/W
The register is used to control the functions of each I/O port pin. Control bits of MD0 and MD1 are
defined in Table 7-3.
Table 7.3 Control Bits Definition of the Port x Control Register and Its Relevant
READ/WRITE Operation of Port Data Register
PxnMD1 PxnMD0
0 0
1
1 0
1
14 13
1 1
R/W R/W
6 5
1 1
R/W R/W
14 13
1 1
R/W R/W
6 5
1 1
R/W R/W
Pin Status READ
Function 2 Pin status
Output Pin Status
Input Pin status
(Pull-up MOS on)
Input Pin status
(Pull-up MOS off)
12 11 10
1 1 1
R/W R/W R/W
4 3 2
1 1 1
R/W R/W R/W
12 11 10
1 1 1
R/W R/W R/W
4 3 2
1 1 1
R/W R/W R/W
WRITE
Can write to GPxDR, but has no effect
on pin status.
Value written to GPxDR is output to pin.
Can write to GPxDR, but has no effect
on pin status.
Can write to GPxDR, but has no effect
on pin status.
9 8
1 1
R/W R/W
1 0
1 1
R/W R/W
9 8
1 1
R/W R/W
1 0
1 1
R/W R/W
Rev. 3.0, 03/01, page 73 of 390