Ringback Specification; Settling Limit Guideline; Thermal Specifications - Intel PENTIUM PRO Manual

150 mhz, 166 mhz, 180 mhz and 200 mhz
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E
Figure 37. 3.3 V Tolerant Signal Overshoot/Undershoot and Ringback
5.2.

RINGBACK SPECIFICATION

Ringback refers to the amount of reflection seen after
a signal has undergone a transition. The ringback
specification is the voltage that the signal rings
back to after achieving its farthest excursion. See
Figure 37 for an illustration of ringback. Excessive
ringback can cause false signal detection or extend
the propagation delay. The ringback specification
applies to the input pin of each receiving agent.
Violations of the signal Ringback specification are not
allowed under any circumstances.
Ringback can be simulated with or without the input
protection diodes that can be added to the input
buffer model. However, signals that reach the
clamping voltage should be evaluated further. See
Table 23 for the signal ringback specifications for
Non-GTL+ signals
Table 23. Signal Ringback Specifications
Transition
Maximum Ringback
(with input diodes present)
0→1
1→0
PENTIUM® PRO PROCESSOR AT 150, 166, 180, and 200 MHz
5.3.
A Settling Limit defines the maximum amount of
ringing at the receiving pin that a signal must be
limited to before its next transition. The amount
allowed is 10% of the total signal swing (V
above and below its final value. A signal should be
within the settling limits of its final value, when either
in its high state of low state, before it transitions
again.
Signals that are not within their settling limit before
transitioning are at risk of unwanted oscillations
which could jeopardize signal integrity. Simulations to
verify Settling Limit may be done either with or
without the input protection diodes present. Violation
of the Settling Limit guideline is acceptable if
simulations of 5-10 successive transitions do not
show the amplitude of the ringing increasing in the
subsequent transitions.
6.0.
Table 5 specifies the Pentium Pro processor power
2.5 V
dissipation. It is highly recommended that systems
be designed to dissipate at least 35-40W per
0.8 V
processor to allow the same design to accommodate

SETTLING LIMIT GUIDELINE

THERMAL SPECIFICATIONS

-V
)
HI
LO
59

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