Figure 50. Ethernet Pim Block Diagram - Alcatel 1850 TSS-320 Technical Handbook

3.4.5.2.1 Plug-in Modules (PIM)
As already mentioned Plug in Modules allows PACKET PROCESSOR cards to host several interfaces,
providing the dedicated termination and adaptation functionalities.
3.4.5.2.1.1 Ethernet (FE/GE/10GE) PIM
Allows PACKET PROCESSOR boards to host ethernet interfaces, providing both bridging functionalities
(promisquous mode: frames are not discarded) and switching functionalities (non-promisquous mode:
depending on MAC address, frames can be discarded).
ETY Sk
See section 3.4.5.1 on page 89 for detailed process description.
ETY So
See section 3.4.5.1 on page 89 for detailed process description.
ETH MAC processing Sk
See section 3.4.5.1 on page 89 for detailed process description.
ETH MAC processing So
See section 3.4.5.1 on page 89 for detailed process description.
3.4.5.2.1.2 Multiservice PIM
The Multiservice PIM allows interworking between TDM traffic and packet based traffic, providing data
encapsulation functionalities and technology specific path monitoring and termination (i.e. SDH HO and
LO).
Packet based traffic can be encapsulated in different ways, depending on its nature: ETH is transported
using GFP encapsulation, while IP/MPLS traffic can be mapped over HDLC (via POS encapsulation).
Encapsulated traffic is then mapped into virtually or contiguously concatenated technology specific virtual
containers (e.g virtually or contiguously concatenated HO VC-4/3, virtually concatenated LO VC3/12/11).
Alcatel 1850 TSS-320 Rel. 1.1
94/270 8DG 07734 AAAA Edition 01
PKT
processor
ETH
MAC proc
ETY
ETY
Sk
Sk ETY
Sk
ETH PIM

Figure 50. Ethernet PIM block diagram.

ETH
MAC proc
ETY
ETY
Sk
So ETY
So
Technical Handbook Common
Functional Description