Figure 55. Data Board Generic Control Architecture - Alcatel 1850 TSS-320 Technical Handbook

The architecture second level comprises two kinds of controllers:
• redundant Second Level Controllers resident on Matrix (MT320) boards acting as controllers
of the "real" physical machine for all the SDH, PDH and WDM functionalities. On boards
implementing only SDH/WDM functionalities it is not foreseen to have a local microprocessor.
• Local Data Controllers (See Figure 55. on page 100) acting as controllers of the "real" physical
machine for all the "Data" functionalities. Local Data Controller micros are present only on
boards that implement "data" related functionalities (e.g L2 Switch functionalities)
Any slot of 1850 TSS-320 is reached by two different logical interfaces:
• A "message interface" (10/100 Fast Ethernet LAN) that has to be used for communication
among microprocessor and/or for propagation of control packets extracted from the data path
• A "register interface" (ISPB bus) that is used for configuration and access to any kind of
component, and is driven by second level controller microprocessors.
1850 TSS-320 network element foresees also two other kind of LAN interfaces:
• Gigabit Ethernet Internal LAN interfaces are used as a backbone to connect the master shelf
with some drop shelves in such a way that all processors are visible on the same LAN. This
backbone is mainly intended for communication between the Equipment controller and all the
other processors hosted by main and drop shelf.
• Fast Ethernet interfaces for communication between the equipment controller and the
management systems.
In addition to the previous interfaces the 1850 TSS-320 implements several HW interfaces for internal
functions like, for instance: remote inventory reading, FPGA download and activation.
A key concept applied to the control architecture of 1850 TSS-320 is redundancy.
First Level Controller microprocessor and Second Level Controller microprocessor are redundant.
Local data controllers (LDC) are not redundant from data point of view because protection of the data path
is usually made implementing protocols (like STP) standardized by IEEE or IETF.
Alcatel 1850 TSS-320 Rel. 1.1
100/270 8DG 07734 AAAA Edition 01
Sw itch
Mes s age IF
L D C
L D C
A rbiter + B ridge +
F ront E nd F P GA

Figure 55. Data Board Generic Control Architecture

F L C
F L C
L A N
L A N
Sw itch
S L C
S L C
R egis ter IF
HW
Data B oard
Technical Handbook Common
Functional Description