Figure 33. Packet Processor - Alcatel 1850 TSS-320 Technical Handbook

Metro core transport service switch
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PACKET PROCESSOR: providing MPLS switching for customer or provider traffic aggregation.
The board can host several interfaces by means of Plug In Modules (PIM), thus reaching the best
performances in terms of flexibility and modularity.
In PIM resides the termination and adaptation functions related to the specific layer.
E, G E, 1 0G E
E, G E, 1 0G E
ETH
ETH
Flow
Flow
Flow
Flow
ETH
ETH
PH Y
PH Y
PHY
PHY
ctrl
ctrl
M AC
M AC
M AC
M AC
ctrl
ctrl
ETH PIM
ETH PIM
2 0G PAC KET PRO C ESSO R
2 0G PAC KET PRO C ESSO R
Figure 34. on page 66 describes the simplified portion of the system dealing with the management of data
traffic mapping into SDH frames.
Both data into HO SDH and into LO SDH mappings are supported, and managed by PACKET
PROCESSOR cards.
When Data over HO SDH tributaries mapping is managed, 20G PACKET PROCESSOR cards are directly
interfaced to the UNIVERSAL MATRIX in order to provide the functionalities of the standard HPC
connection function.
The mapping of data over LO SDH tributaries mapping is managed in different way, instead.
Data cards manage the mapping of the data signals into Lower Order tributaries, managing a Virtual
container with a meaningless path overhead: LO path termination, therefore, is not managed in data
cards. Due to the particular implementation, the LO SDH tributaries, carrying data clients, are mapped into
a structured HO tributary (again, the HO VCs are created with a meaningless path OH).
It is therefore necessary to interface the data cards to the UNIVERSAL MATRIX in order to manage the
HO tributaries aggregation towards the LOA cards for SDH LO tributaries processing.
This first passage into the LOA card is necessary not only for interfacing the LO SDH matrix device, in
order to provide LO cross connection, but also in order to provide the real LO path termination
functionality: the meaningless HO tributaries are terminated and the LO containers are recovered, then
the LO path OH is managed as foreseen by SDH standards.
Technical Handbook Common
Functional Description
M ULTISERVIC E PIM
M ULTISERVIC E PIM
H P
H P
HP
HP
LPT
LPT
LVC
LVC
LPT
LPT
LVC
LVC
T
T
T
T
So
So
RX
RX
So
So
RX
RX
So
So
So
So
Functions used for
Functions used for
intrashelf connections
intrashelf connections
O D U k
O D U k
O D Uk
O D Uk
L2
L2
L2
L2
So
So
m ap
m ap
So
So
m ap
m ap
H P
H P
H P
H P
H VC
H VC
HVC
HVC
T
T
T
T
RX
RX
RX
RX
So
So
So
So
M AC
M AC
M AC
M AC
proc
proc
proc
proc
VLAN
VLAN
VLAN
VLAN
proc
proc
proc
proc
SVLAN
SVLAN
SVLAN
SVLAN
proc
proc
proc
proc
ETH
ETH
ETH
ETH
M PLS
M PLS
M PLS
M PLS
Sk
Sk
Sk
Sk
proc
proc
proc
proc
ETS
ETS
ETS
ETS
proc
proc
proc
proc
RPR
RPR
RPR
RPR
Sk
Sk
Sk
Sk
PAC KET PRO C ESSO R
PAC KET PRO C ESSO R
PAC KET PRO C ESSO R
PAC KET PRO C ESSO R
O n board
O n board
O n board
O n board
O n board
O n board
Packet
Packet
Packet
Packet
Packet
Packet
switch
switch
switch
switch
switch
switch

Figure 33. PACKET PROCESSOR

M U LTISERVIC E PIM
M U LTISERVIC E PIM
HP
HP
H P
H P
LVC
LVC
LPT
LPT
LVC
LVC
LPT
LPT
T
T
T
T
RX
RX
Sk
Sk
RX
RX
Sk
Sk
Sk
Sk
Sk
Sk
Functions used for
Functions used for
intrashelf connections
intrashelf connections
O D U k
O D U k
O D Uk
O D Uk
Sk
Sk
Sk
Sk
HP
HP
H P
H P
H VC
H VC
HVC
HVC
T
T
T
T
RX
RX
TD M
TD M
TD M
RX
RX
TD M
TD M
TD M
Sk
Sk
Sk
Sk
M AC
M AC
M AC
M AC
proc
proc
proc
proc
M AC
M AC
M AC
M AC
M AC
M AC
M AC
M AC
VLAN
VLAN
VLAN
VLAN
proc
proc
proc
proc
VLAN
VLAN
VLAN
VLAN
VLAN
VLAN
VLAN
VLAN
SVLAN
SVLAN
SVLAN
SVLAN
proc
proc
proc
proc
SVLAN
SVLAN
SVLAN
SVLAN
SVLAN
SVLAN
SVLAN
SVLAN
M PLS
M PLS
ETH
ETH
M PLS
M PLS
ETH
ETH
proc
proc
Sk
Sk
proc
proc
Sk
Sk
M PLS
M PLS
M PLS
M PLS
M PLS
M PLS
M PLS
M PLS
ETS
ETS
ETS
ETS
proc
proc
proc
proc
ETS
ETS
ETS
ETS
ETS
ETS
ETS
ETS
Packet
Packet
Packet
Packet
Packet
Packet
Packet
Packet
RPR
RPR
RPR
RPR
Sk
Sk
Sk
Sk
PAC KET PRO C ESSO R
PAC KET PRO C ESSO R
UNIVERSAL
PAC KET PRO C ESSO R
PAC KET PRO C ESSO R
AG N O STIC
AG N O STIC
MATRIX
M ATRIX
M ATRIX
O n board
O n board
O n board
O n board
O n board
O n board
Packet
Packet
Packet
Packet
Packet
Packet
switch
switch
switch
switch
switch
switch
20G PAC KET PRO C ESSO R
20G PAC KET PRO C ESSO R
Alcatel 1850 TSS-320 Rel. 1.1
8DG 07734 AAAA Edition 01
L2
L2
L2
L2
m ap
m ap
m ap
m ap
Flow
Flow
ETH
ETH
Flow
Flow
ETH
ETH
PH Y
PH Y
PH Y
PH Y
ctrl
ctrl
M AC
M AC
ctrl
ctrl
M AC
M AC
ETH PIM
ETH PIM
65/270

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