Sdh Pdh Mapping Processing Blocks; Figure 45. Pdh Mapping Into Ho Sdh (Hoi) Card Implementation And Itu-T Functional Model - Alcatel 1850 TSS-320 Technical Handbook

3.4.4 SDH PDH mapping processing blocks

3.4.4.1 HOI card
The Higher Order Interface card manage the mapping of PDH clients into Higher Order SDH tributaries
(e.g. E4 over VC-4).
The card is interfaced with the payload UNIVERSAL MATRIX device, for HPC functionalities
implementation. HVC functionalities managed in the HOI card are limited, according to G.783
specifications, to the HTCT (i.e. the card implements a 'before matrix' TCT). Non intrusive monitoring of
the PDH signals is performed before their mapping into SDH/Sonet payload in one direction, after the
demapping in the other one.
The generic card block diagram, with its atomic functions representation is depicted in Figure 46 on page
64.

Figure 45. PDH mapping into HO SDH (HOI) card implementation and ITU-T functional model

a) Plesiochronous Physical layer
Note that q = 4,3.
• Physical Trail Termination (PPI): Eq_TT
Eq_TT_Sk
Electrical signal recovery
LOS detection
Eq_TT_So
Generation of the electrical signal
Technical Handbook Common
Functional Description
HVC
RX
HPT
So
LPAn
So
PDH
proc
PPI
Sk
Pqe
Eq/Pqe Eq/Pqx Sn/Pqx
Eq Sn
Sn/SnD
SnD
HVC
TX
HPT
Sk
LPAn
Sk
PDH
proc
PPI
So
HOI card
Sn/Pqx Eq/Pqx
Sn Eq
Sn/SnD
SnD
HOI card
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8DG 07734 AAAA Edition 01
Pqe
Eq/Pqe
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