Lmatrix; Figure 109. Functional Block Diagram Of Lmatrix - Alcatel 1850 TSS-320 Technical Handbook

4.2.4 Lmatrix

This function is not available in current release, It's accomplished with a subassembly that can be plugged
on a devoted connector.
The Lower Order cross connection performs fully non-blocking VC3 (lower order), VC12 and/or VC11
switch.
The TDM matrix has a whole capacity of 40Gbit/s. A cross over circuit connects all input/output links (24
at 2.5G Bit/s) and allows performing of LOA EPS protection in 4+2 configuration.
The unit supports the following functionalities:
– Cross-connection with VC3, VC12/VC11 granularity of up to 256 STM-1 signals, non blocking
– SNCP protection
– alarm reporting
3.1 Gbit/s
LOA
BOARD #1
Link "0"
Link "1"
LOA
BOARD #4
LOA spare
#1
Link "24"
LOA spare
#2
Alcatel 1850 TSS-320 Rel. 1.1
168/270 8DG 07734 AAAA Edition 01
CK 38+SYNCH
Link "0"
Link "1"
C
R
O
NGI
S
2.5Gbit/s
S
B
A LO Matrix
R
Link "16"
Remote
Lprot.CH
Inventory
SPI "A"
Shelf
Controller
SPI "B"
interface
Chopin

Figure 109. Functional block diagram of Lmatrix

LMATRIX
VCXO
622.080 MHz
Link "0"
Link "1"
C
R
O
NGI
S
2.5Gbit/s
S
B
A
R
Link "16"
DC/DC
ISPB converter
SPI
Power KYRA
Supply
Battery
48-60V
Technical Handbook Common
3.1G bit/s
LOA
BOARD #1
Link "0"
Link "1"
LOA
BOARD #4
LOA spare
#1
Link "24"
LOA spare
#2
Unit Descriptions