Local Data Controller; Figure 59. Typical Data Board With Ldc Controller - Alcatel 1850 TSS-320 Technical Handbook

3.5.3 Local Data Controller

In Figure 59. on page 107 it is shown the control architecture of the 20G PACKET PROCESSOR board.
PIM A PIM A PIM A PIM A
ISC B ISC B
ISC A ISC A
ISC A ISC A
ISC B ISC B
PIM B PIM B PIM B PIM B
DBG DBG
DBG DBG
LED LED
The LDC controller microprocessor is resident on a PQ2/MC2E module equipped with 512 Mbytes of
SDRAM.
Typical data boards require that the same components can be seen by both SLC microprocessors and
the local data controller. In any case the complete provisioning of a component is always in charge of only
one micro: SLC if it is a SDH/WDM transport component and LDC if it is a data component. In order to
be compliant with this philosophy, GFP mapping is now considered part of SDH/WDM functionality and
as such it is completely managed by the SLC controllers.
MDIO is exported to PIMs and to the LAN Switch to allow configuration of Ethernet Phys independently
from their position.
What is told in the previous two paragraph is also applicable to PIM modules.
A data board could in principle host up to two PIM modules whose components must be visible both to
SLC microprocessors and LDC microprocessor.
At backplane LAN access is provided via 2 10/100 Mbit/s ports (LAN 1 and LAN 2 in Figure 59. on page
107) that allow connection with both the LAN switches devices resident on matrix boards.
The two ports are directly connected to a 5 ports LAN switch. This LAN switch is also connected to the
LAN exported by PQ2/MC2E module assuring connection among LDC microprocessor and all the other
microprocessors resident in the electronic shelf.
Technical Handbook Common
Functional Description
DATA ENGINE DATA ENGINE DATA ENGINE DATA ENGINE
ISPB 2 ISPB 2 NP_CTRL NP_CTRL
ISPB ISPB
TESLA TESLA
ISPB ISPB
SPI SPI
(*) (*)
LAN LAN
LAN Switch LAN Switch LAN Switch LAN Switch

Figure 59. Typical Data Board with LDC controller

HW/SW_Ready HW/SW_Ready
Rem Inv Rem Inv Rem Inv Rem Inv
Qecc Qecc
HDLC HDLC
PCI PCI HW_CFG HW_CFG
LAN LAN
PQ2/MC2 PQ2/MC2
MDIO MDIO
(512 (512 (256 Mega SDR) (256 Mega SDR)
LAN LAN
Alcatel 1850 TSS-320 Rel. 1.1
8DG 07734 AAAA Edition 01
DCC A/B DCC A/B
ISPB 1 ISPB 1
ISC A ISC A
Spider A Spider A Spider A Spider A ISC B ISC B
Spider B Spider B Spider B Spider B
(*) (*)
LAN 1 LAN 1
LAN 2 LAN 2
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