Interrupt Flag Setup - Panasonic F77G User Manual

Chapter 3 Interrupts
3-1-4

Interrupt Flag Setup

Interrupt request flag (IR) setup by the software
The interrupt request flag is operated by the hardware. That is set to "1" when any interrupt factor is
generated, and cleared to "0" when the interrupt is accepted. If you want to operate it by the software, the
IRWE flag of MEMCTR should be set to "1".
Interrupt flag setup procedure
A setup procedure of the interrupt request flag set by the hardware and the software shows as follows ;
Setup Procedure
(1) Disable all maskable interrupts.
PSW
bp6 : MIE = 0
(2) Select the interrupt factor.
(3) Enable the interrupt request flag to
be rewritten.
MEMCTR (x'3F01')
bp2 : IRWE = 1
(4) Rewrite the interrupt request flag.
xxxICR
bp0 : xxxIR
(5) Disable the interrupt request flag to
be rewritten.
MEMCTR (x'3F01')
bp2 : IRWE = 0
(6) Set the interrupt level.
xxxICR
bp7-6 : xxxLV1-0
PSW
bp5-4 : IM1-0
(7) Enable the interrupt.
xxxICR
bp1 : xxxIE = 1
(8) Enable all maskable interrupts.
PSW
bp6 : MIE = 1
III - 14
Overview
Description
(1) Clear the MIE flag of PSW to disable all
maskable interrupts. This is necessary,
especially when the interrupt control register is
changed.
(2) Select the interrupt factor such as interrupt
edge selection, or timer interrupt cycle change.
(3) Set the IRWE flag of MEMCTR to enable the
interrupt request flag to be rewritten. This is
necessary only when the interrupt request flag
is changed by the software.
(4) Rewrite the interrupt request flag (xxxIR) of the
interrupt control register (xxxICR).
(5) Clear the IRWE flag so that interrupt request
flag can not be rewritten by the software.
(6) Set the interrupt level by the xxxLV1-0 flag of
the interrupt control register (xxxICR).
Set the IM1-0 flag of PSW when the interrupt
acceptance level of CPU should be changed.
(7) Set the xxxIE flag of the interrupt control
register (xxxICR) to enable the interrupt.
(8) Set the MIE flag of PSW to enable maskable
interrupts.