Panasonic F77G User Manual page 284

Microcomputer mn101c series
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Chapter 7 16-bit Timer
Count Timing of Standard PWM Output (when Compare Register 1 is x'0000')(Timer 7)
Here is the count timing at setting x'0000' to the compare register 1.
Count
clock
TM7EN
flag
Compare
regsiter 1
Binary
counter
TM7IO output
(PWM output)
Figure 7-6-2
Count Timing of Standard PWM Output (when Compare Register 1 is x'0000')
PWM output shows "H ", when TM7EN flag is stopped (at "0").
Count Timing of Standard PWM Output (when Compare Register 1 is x'FFFF')(Timer 7)
Here is the count timing at setting x'FFFF' to the compare register 1.
Count
clock
TM7EN
flag
Compare
register 1
Binary
counter
TM7IO output
(PWM output)
Figure 7-6-3
Count Timing of Standard PWM Output (when Compare Register 1 is x'FFFF')
When the standard PWM output is operated, set the TM7BCR flag of the TM7MD2 register to
"0" to select the full count over flow as a binary counter clear source and a PWM output setup
("H" output) source.
By setting the T7PWMSL flag of the TM7MD2 register, the TM7OC1 compare match or the
TM7OC2 compare match can be selected as a PWM output reset ("L" output) source.
VII - 24
16-bit Standard PWM Output
N
0000 0001
N-1
H
L
0000 0001
N-1
N
0000
FFFE FFFF
N+1 N+2
FFFF
N+1 N+2
FFFE FFFF
0000 0001
N
0000 0001
N-1
N-1
N
N+1
N+1

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