Panasonic F77G User Manual page 356

Chapter 11 Serial Interface 0, 1
Reception Timing
Clock
(SBT pin)
Input data
(SBI pin)
Transfer bit counter
SCnRBSY
Interrupt
(SCnTIRQ)
Figure 11-3-9
Clock
(SBT pin)
Input data
(SBI pin)
Transfer bit counter
SCnRBSY
(Write data to TXBUFn)
Interrupt
(SCnTIRQ)
Figure 11-3-10
XI - 30
Operation
(at master)
Tmax=2.5 T T
0
(Write data to TXBUFn)
Reception Timing (rising edge, start condition is enabled)
(at master)
Tmax=1.5 T
T
0
Reception Timing (rising edge, start condition is disabled)
1 2 3 4
1 2 3 4 5
5 6 7
6 7