Bit Event Count; Operation - Panasonic F77G User Manual

Microcomputer mn101c series
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6-4

8-bit Event Count

6-4-1

Operation

Event count operation has 2 types ; TMnIO input and synchronous TMnIO input can be selected as the
count clock.
8-bit Event Count Operation
Event count means that the binary counter (TMnBC) counts the input signal from external to the TMnIO
pin. If the value of the binary counter reaches the setting value of the compare register (TMnOC), inter-
rupts can be generated at the next count clock.
Event Input
Count Timing of TMnIO Input (Timers 0, 1, 4 and 5)
When TMnIO input is selected, TMnIO input signal is directly input to the count clock of the timer n. The
binary counter counts up at the falling edge of the TMnIO input signal.
TMnIO
input
TMnEN
flag
Compare
register
Binary
counter
Interrupt
request flag
Figure 6-4-1
When the TMnIO input is selected for count clock source and the value of the timer n binary
counter is read during operation, incorrect value at count up may be read out. To prevent
this, use the event count by synchronous TMnIO input, as the following page.
Table 6-4-1
Timer 0
TM0IO input
(P11)
Synchronous
Synchronous
TM0IO input
M
00
Count Timing of TMnIO Input (Timers 0, 1, 4 and 5)
Event Count Input Clock
Timer 2
Timer 4
TM1IO input
TM4IO input
(P76)
(P13)
Synchronous
TM1IO input
TM4IO input
N
01
02
N-1
Chapter 6 8-bit Timers
Timer 5
TM5IO input
(P77)
Synchronous
TM5IO input
N
00
01
8-bit Event Count
VI - 19

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