2-4-2 Interrupt Sources and Vector Addresses
In addition to reset, there are 20 interrupt vectors that indicate the starting
addresses of interrupt programs. These vectors are located in the 80-byte
ROM address area X'04004' to X'04053'.
Table 2-4-1 Interrupt Control Registers
Interrupt Source
Vector Number
0
Reset
1
Non-maskable interrupt (NMI)
2
External interrupt 0 (IRQ0)
3
External interrupt 1 (IRQ1)
Reserved
4
Reserved
5
6
Timer 2 compare-match (TM2IRQ)
7
Time base period (TBIRQ)
8
SC0 transfer complete (SC0IRQ)
9
Reserved
10
A/D conversion complete (ADIRQ)
11
External interrupt 2 (IRQ2)
12
External interrupt 3 (IRQ3)*
13
Reserved
14
Timer 3 compare-match (TM3IRQ)
15
Timer 4 compare-match (TM4IRQ)
16
Timer 5 compare-match (TM5IRQ)
17
Reserved
18
Reserved
19
Reserved
20
Reserved
Set the vector addresses for reserved and unused interrupts to
an address containing an RTI instruction.
Control Register
Vector Address
(address)
(X'03FE1')
NMICR
(X'03FE2')
IRQ0ICR
(X'03FE3')
IRQ1ICR
(X'03FE4')
(X'03FE5')
(X'03FE6')
TM2ICR
(X'03FE7')
TBICR
(X'03FE8')
SC0ICR
(X'03FE9')
(X'03FEA')
ADICR
(X'03FEB')
IRQ2ICR
(X'03FEC')
IRQ3ICR
(X'03FED')
(X'03FEE')
TM3ICR
(X'03FEF')
TM4ICR
(X'03FF0')
TM5ICR
(X'03FF1')
(X'03FF2')
(X'03FF3')
(X'03FF4')
Chapter 2 Basic CPU Functions
X'04000'
X'04004'
X'04008'
X'0400C'
X'04010'
X'04014'
X'04018'
X'0401C'
X'04020'
X'04024'
X'04028'
X'0402C'
*
IRQ31CR cannot be used
X'04030'
except for 48-pin QFH
package.
X'04034'
X'04038'
X'0403C'
X'04040'
X'04044'
X'04048'
X'0404C'
X'04050'
33
Interrupts