Panasonic F77G User Manual page 419

Master Reception Timing
(1)
SDA
SCL
Interrupt
IICBSY
Set data to SC3TRB
8-bit (2)
transmission
. .
1 2 8 ACK
(1) Output start condition.
(2) Bus released period, ACK bit is received.
(3) Interrupt transaction
- Setup for the reception mode : SC3REX = 0
- Disable start condition : SC3STE = 1
- Start communication : set data to SC3TRB.
(4) Output ACK bit.
(5) Bus released period, interrupt transaction
- Complete communication : clear IICBSY flag
(6) Generate stop condition.
Figure 12-3-17
(3) 8-bit
reception
1 2
Set data to SC3TRB
[Set dummy data]
Master Reception Timing
Chapter 12 Serial Interface 3
(4) (5)
. .
8 ACK
Clear IICBSY flag
1
0
Operation
(6)
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