Panasonic F77G User Manual page 125

Serial Interface 0 Transmission Interrupt Control Register (SC0TICR)
The serial Interface 0 transmission interrupt control register (SC0TICR) controls interrupt level of serial
Iinterface 0 transmission interrupt, interrupt enable flag and interrupt request. Interrupt control register
should be operated when the maskable interrupt enable flag (MIE) of PSW is "0".
7 6
SC0T SC0T
SC0TICR
LV1 LV0
Figure 3-2-19
5 4 3 2
- - - -
Serial Interface 0 Transmission Interrupt Control Register
(SC0TICR : x'03FF5', R/W)
1 0
(At reset : 0 0 - - - - 0 0)
SC0TIE SC0TIR
SC0TIR
0
1
SC0TIE
0
1
SC0T
LV1
The CPU has interrupt levels from 0 to 3.
These flags set the interrupt level for
interrupt requests.
Chapter 3 Interrupts
Serial interface 0 transmission
interrupt request flag
No interrupt request
Interrupt request generated
Serial interface 0 transmission
interrupt enable flag
Disable interrupt
Enable interrupt
Serial interface 0 transmission
SC0T
interrupt level flag
LV0
Control Registers
III - 31