Description - Panasonic F77G User Manual

4-5 Port 5
4-5-1

Description

General Port Setup
Each bit of the port 5 control I/O direction register (P5DIR) can be set individually to set pins as input or
output. The control flag of the port 5 direction control register (P5DIR) is set to "1" for output mode, and
"0" for input mode.
To read input data of pin, set the control flag of the port 5 direction control register (P5DIR) to "0" and
read the value of the port 5 input register (P5IN).
To output data to pin, set the control flag of the port 5 direction control register (P5DIR) to "1" and write
the value of the port 5 output register (P5OUT).
Each pin can be set individually whether pull-up resistor is added or not, by the port 5 pull-up resistor control
register (P5PLU). Set the control flag of the port 5 pull-up resistor control register (P5PLU) to "1" to add
pull-up resistor.
Special Function Pin Setup
P50 to P52 are used as I/O pin for the serial interface 3, as well. P51 is output pin of the serial interface 3
transmission data. When the SC3SBOS flag of the serial interface 3 mode register 1 (SC3MD1) is "1", P51
is serial data output pin. P50 is the input pin of the serial interface 3 reception data. P52 is I/O pin of the
serial interface 3 clock. When the SC3SBTS flag of serial interface 3 mode register 1 (SC3MD1) is "1", P52
is serial clock output pin.
IP53 to P54 are used as I/O pin for the serial interface 4, as well. P53 is data I/O pin of the serial interface
4. When the SELI2C flag of the serial interface 4 address register 1 (SC4AD1) is "1", P53 is serial interface
4 I/O pin. P54 is the serial interface 4 clock I/O pin. When the SELI2C flag of serial interface 4 address
register 1 (SC4AD1) is "1", P54 is serial clock I/O pin.
Chapter 4 I/O Ports
IV - 21
Port 5