Instruction Execution Controller - Panasonic F77G User Manual

2-1-3

Instruction Execution Controller

The instruction execution controller consists of four blocks: memory, instruction queue, instruction regis-
ters, and instruction decoder.
Instructions are fetched in 1-byte units, and temporarily stored in the 2-byte instruction queue. Transfer
is made in 1-byte or half-byte units from the instruction queue to the instruction register to be decoded by
the instruction decoder.
Figure 2-1-2
7
Memory
15
Instruction queue
Instruction register
Instruction decoder
Instruction Execution Controller Configuration
0
Fetch
1
byte byte
0
1 byte or a half byte
0
7
Instruction decoding
CPU control signals
Chapter 2 CPU Basics
II - 5
Overview