Panasonic F77G User Manual page 147

Microcomputer mn101c series
Table of Contents

Advertisement

Noise Filter Setup Example (External interrupt 0 and 1)
Noise remove function is added to the input signal from P20 pin to generate the external interrupt 0
(IRQ0) at the rising edge. The sampling clock is set to fosc, and the operation state is fosc = 20 MHz.
An example setup procedure, with a description of each step is shown below.
Setup Procedure
(1) Specify the interrupt active edge.
IRQ0ICR (x'3FE2')
bp5
(2) Select the sampling clock.
NFCTR0 (x'3F8E')
bp2-1
(3) Set the noise filter operation.
NFCTR0 (x'3F8E')
bp0
(4) Set the interrupt level.
IRQ0ICR (x'3FE2')
bp7-6
(5) Enable the interrupt.
IRQ0ICR (x'3FE2')
bp1
Note : The above (2) and (3) are set at the same time.
The input signal from the P20 pin generates the external interrupt 0 at the rising edge of the signal,
after passing through the noise filter.
The setup of the noise filter should be done before the interrupt is enabled.
The external interrupt pins are recommended to be pull-up in advance.
: REDG0
= 1
: NF0SCK1-0 = 00
: NF0EN
= 1
: IRQ0LV1-0= 10
: IRQ0IE
= 1
Description
(1)
Set the REDG0 flag of the external interrupt 0
control register (IRQ0ICR) to "1" to specify the
interrupt active edge to the rising edge.
(2)
Select the sampling clock to fosc by the
NF0SCK 1-0 flag of the noise filter control
register (NFCTR0).
(3)
Set the NF0EN flag of the NFCTR0 register to
"1" to add the noise filter operation.
(4)
Set the interrupt level by the IRQ0LV 1- 0 flag of
the IRQ0ICR register.
If the interrupt request flag has been already
set, clear the request flag.
[
Chapter 3 3-1-4. Interrupt flag setup ]
(5)
Set the IRQ0IE flag of the IRQ0ICR register to
"1" to enable the interrupt.
Chapter 3 Interrupts
III - 53
External Interrupts

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

Panaxseries mn101c77cPanaxseries mn101f77g

Table of Contents