Panasonic F77G User Manual page 223

Binary counter is 8-bit up counter. If any data is written to compare register during counting is stopped,
binary counter is cleared to x'00'.
Timer 0 Binary Counter (TM0BC)
7
TM0BC7 TM0BC6 TM0BC5 TM0BC4 TM0BC3 TM0BC2 TM0BC1 TM0BC0
TM0BC
Figure 6-2-5 Timer 0 Binary Counter (TM0BC : x'03F50', R)
Timer 1 Binary Counter (TM1BC)
7
TM1BC7 TM1BC6 TM1BC5 TM1BC4 TM1BC3 TM1BC2 TM1BC1 TM1BC0
TM1BC
Figure 6-2-6 Timer 1 Binary Counter (TM1BC : x'03F51', R)
Timer 4 Binary Counter (TM4BC)
7
TM4BC7 TM4BC6 TM4BC4 TM4BC4 TM4BC3 TM4BC2 TM4BC1 TM4BC0
TM4BC
Figure 6-2-7 Timer 4 Binary Counter (TM4BC : x'03F60', R)
Timer 5 Binary Counter (TM5BC)
7
TM5BC7 TM5BC6 TM5BC5 TM5BC5 TM5BC3 TM5BC2 TM5BC1 TM5BC0
TM5BC
Figure 6-2-8 Timer 5 Binary Counter (TM5BC : x'03F61', R)
6 5 4 3
6 5 4 3
6 5 4 3
6 5 4 3
2 1 0
( At reset : X X X X X X X X )
2 1 0
( At reset : X X X X X X X X )
2 1 0
( At reset : X X X X X X X X)
2 1 0
( At reset : X X X X X X X X)
Chapter 6 8-bit Timers
VI - 9
Control Registers