Control Registers - Panasonic F77G User Manual

Microcomputer mn101c series
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Chapter 2 CPU Basics
ROM Correction Address 2 Setting Register (RC2AP)
7
RC2APL7
RC2APL
Figure 2-7-9
7
RC2APM
RC2APM7
Figure 2-7-10
7
RC2APH
-
Figure 2-7-11
Do not set the same address to more than two RCnAP (H/M/L) register. If there are several
registers set the same address, the order of priority is as follows :
Here is the correspondence of the ROM correction address setting register, a ROM correction control
flag of ROM correction control register and the RC rector table.
ROM Correction address setting register
Register
RC0APL
RC0APM
RC0APH
RC1APL
RC1APM
RC1APH
RC2APL
RC2APM
RC2APH
II - 34
ROM Correction
6
5
4
RC2APL6 RC2APL5 RC2APL4 RC2APL3 RC2APL2 RC2APL1 RC2APL0 ( At reset : X X X X X X X X)
ROM Correction Address 2 Setting Register (lower 8 bits)
(RC2APL : x'03FCD', R/W)
6
5
4
RC2APM6 RC2APM5 RC2APM4 RC2APM3 RC2APM2 RC2APM1 RC2APM0 ( At reset : X X X X X X X X )
ROM Correction Address 2 Setting Register (middle 8 bits)
(RC2APM : x'03FCE', R/W)
6
5
4
-
-
-
ROM Correction Address 2 Setting Register (upper 2 bits)
(RC2APH : x'03FCF', R/W)
RC0AP > RC1AP > RC2AP
Table 2-7-1 Correspondence
Address
x'3FC7'
x'3FC8'
x'3FC9'
x'3FCA'
x'3FCB'
x'3FCC'
x'3FCD'
x'3FCE'
x'3FCF'
3
2
1
3
2
1
3
2
1
-
-
RC2APH1 RC2APH0 ( At reset : - - - - - - X X )
ROM correction
control flag
RC0EN
RC1EN
RC2EN
0
0
0
RC-vector table
Vector
Address
RC0V(L)
x'0010'
RC0V(H)
x'0012'
RC1V(L)
x'0014'
RC1V(H)
x'0011'
RC2V(L)
x'0013'
RC2V(H)
x'0015'

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Panaxseries mn101c77cPanaxseries mn101f77g

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