Operation - Panasonic F77G User Manual

Chapter 6 8-bit Timers
6-6 8-bit PWM Output
The TMnIO pin outputs the PWM waveform, which is determined by the match timing for the compare
register and the overflow timing of the binary counter.
6-6-1

Operation

Operation of 8-bit PWM Output (Timers 0, 4 and 5)
The PWM waveform with any duty cycle is generated by setting the duty cycle of PWM "H" period to the
compare register (TMnOC). The cycle is the period from the full count to the overflow of the 8-bit timer.
Table 6-6-1 shows PWM output pins ;
PWM output pin
Count Timing of PWM Output (at normal) (Timers 0, 4 and 5)
Count
clock
TMnEN
flag
Compare
register
Binary
counter
PWM source
wave form
TMnIO output
(PWM output)
PWM source waveform,
(A)
(B)
(C)
The PWM outputs the PWM source waveform with 1 count clock delay. This is
happened, because the waveform is created inside to correct the output cycle.
VI - 26
8-bit PWM Output
Table 6-6-1
Timer 0
TM0IO output pin
(P10, P11)
00 01 N-1 N
(A) (B)
Set time in the compare register
PWM basic components ( overflow time of binary counter)
Figure 6-6-1 Count Timing of PWM Output (at Normal)
is "H" while counting up from x'00' to the value stored in the compare register.
is "L" after the match to the value in the compare register, then the binary counter
continues counting up till the overflow.
is "H" again, if the binary counter overflow.
Output Pins of PWM Output
Timer 4
TM4IO output pin
(P12, P13)
N
N+1 N+2 FE FF
(C)
Timer 5
TM5IO output pin
(P52)
00 01 N-1 N N+1