Panasonic F77G User Manual page 63

Addressing mode
Dn/DWn
An/SP
Register direct
PSW
imm4/imm8
Immediate
imm16
(An)
Register indirect
(d8, An)
(d16, An)
Register relative
indirect
(d4, PC)
(branch instructions only)
(d7, PC)
(branch instructions only)
(d11, PC)
(branch instructions only)
(d12, PC)
(branch instructions only)
(d16, PC)
(branch instructions only)
(d4, SP)
Stack relative
indirect
(d8, SP)
(d16, SP)
(abs8)
Absolute
(abs12)
(abs16)
(abs18)
(branch instructions only)
(abs8)
RAM short
I/O short
(io8)
(HA)
Handy
Table 2-1-4 Addressing Modes
Effective address
-
-
15
An
15
An+d8
15
An+d16
17
PC+d4
17
PC+d7
17
PC+d11
17
PC+d12
17
PC+d16
15
SP+d4
15
SP+d8
15
SP+d16
7
abs8
11
abs12
15
abs16
17
abs18
7
abs8
15
IOTOP+io8
-
Explanation
Directly specifies the register. Only internal
registers can be specified.
Directly specifies the operand or mask
value appended to the instruction code.
0
Specifies the address using an address
register.
Specifies the address using an address
0
register with 8-bit displacement.
Specifies the address using an address
0
register with 16-bit displacement.
Specifies the address using the program
0 H
counter with 4-bit displacement and H bit.
* 1
Specifies the address using the program
0 H
counter with 7-bit displacement and H bit.
* 1
Specifies the address using the program
0 H
counter with 11-bit displacement and H bit.
* 1
Specifies the address using the program
0 H
counter with 12-bit displacement and H bit.
* 1
Specifies the address using the program
0 H
counter with 16-bit displacement and H bit.
* 1
0
Specifies the address using the stack
pointer with 4-bit displacement.
0
Specifies the address using the stack
pointer with 8-bit displacement.
0 Specifies the address using the stack
pointer with 16-bit displacement.
0
0
Specifies the address using the operand
value appended to the instruction code.
Optimum operand length can be used to
0
specify the address.
0 H
* 1
0
Specifies an 8-bit offset from the address
x'00000'.
0 Specifies an 8-bit offset from the top address
(x'03F00') of the special function register area.
Reuses the last memory address accessed
and is only available with the MOV and
MOVW instructions. Combined use with
absolute addressing reduces code size.
Chapter 2 CPU Basics
H: half-byte bit
* 1
II - 11
Overview