Panasonic F77G User Manual page 241

Microcomputer mn101c series
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Count Timing of PWM Output (when the compare register is x'00') (Timers 0, 4 and 5)
Here is the count timing when the compare register is set to x'00' ;
Count clock
TMnEN
flag
Compare
register
Binary
counter
H
TMnIO output
(PWM output)
L
Figure 6-6-2
When TMnEN flag is stopped ("0") PWM output is "H".
Count Timing of PWM Output (when the compare register is x'FF') (Timers 0, 4 and 5)
Here is the count timing when the compare register is set to x'FF' ;
Count
clock
TMnEN
flag
Compare
register
Binary
00
counter
TMnIO output
(PWM output)
Figure 6-6-3
00
01
N-1
N
N+1 N+2
Count Timing of PWM Output (when compare register is x'00')
01
N-1
N
N+1 N+2
Count Timing of PWM Output (when compare register is x'FF')
00
FE
FF
00
FF
FE
FF
00
Chapter 6 8-bit Timers
01
N-1
N
N+1
01
N-1
N
N+1
8-bit PWM Output
VI - 27

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