Panasonic F77G User Manual page 254

Chapter 6 8-bit Timers
At cascade connection, the binary counter and the compare register are operated as a 16 bit regis-
ter. At operation, set the TMnEN flag of the upper and lower 8-bit timers to "1" to be operated.
Also, the clock source is the one which is selected in the lower 8-bit timer.
Other setup and count timing is the same to the 8-bit timer at independently operation.
When timer 0 and timer 1 are used in cascade connection, timer 1 interrupt request flag is
used. Timer pulse output of timer 0 is "L" fixed output.
An interrupt request of timer 0 is not generated, and the timer 0 interrupt should be disabled.
At the cascade connection, if the binary counter should be cleared by rewriting the compare
register, the TMnEN flags of the lower and upper 8 bits timers mode registers should be set
to "0" to stop the counting, then rewrite the compare register.
VI - 40
Cascade Connection