Cpu Control Registers - Panasonic F77G User Manual

Chapter 2 CPU Basics
2-1-2

CPU Control Registers

This LSI locates the peripheral circuit registers in memory space (x'03F00' to x'03FFF') with memory-
mapped I/O. CPU control registers are also located in this memory space.
Registers Address
x'03F00'
CPUM
x'03F01'
MEMCTR
x'03F0E'
RCCTR
x'03F0A'
SBNKR
x'03F0B'
DBNKR
x'03F2D'
OSCMD
x'03FC7' to
RCnAP
x'03FCF'
x'03FE0'
Reserved
x'03FE1'
NMICR
x'03FE2' to
xxxICR
x'03FFE'
x'03FFF'
Reserved
R/W : Readable / Writable
II - 4
Overview
Table 2-1-2 CPU Control Registers
R/W
CPU mode control register
R/W *1
Memory control register
R/W
ROM correction control register
R/W
Bank register for source address
R/W
Bank register for destination address
R/W
Oscillation frequency control register
R/W
R/W ROM correction address setting register
For debugger
-
Non - maskable interrupt control register
R/W
R/W Maskable interrupt control register
Reserved ( For reading interrupt vector data on interrupt process)
-
Function
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[ Chapter 3 ]
*1 a part of bit is only readable
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