Functions; Interrupts - Panasonic F77G User Manual

Microcomputer mn101c series
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11-1-1

Functions

Table 11-1-1 shows functions of serial interface 0, 1.
Communication style
Interrupt
Used pins
3 channels type
2 channels type
1 channel type
Specification of transfer bit
count / Frame selection
Selection of parity bit
Parity bit control
Selection of start condition
Specification of the first
transfer bit
Specification of input edge /
output edge
Continuous operation
Continuous operation (with
ATC1)
Internal clock 1/8 dividing
Clock source
Maximum transfer rate
osc : Machine clock (High speed oscillation)
fs : System clock [
Chapter 2 2-5. Clock Switching ]
Table 11-1-1
Serial Interface 0, 1 Functions
Serial interface 0
clock synchronous
SC0TIRQ (on transmission
SC0TIRQ
completion)
SC0RIRQ (on reception
completion)
SBO0,SBI0,SBT0
(SBO0, SBT0)
-
1 to 8 bits
-
-
only ""enable start condition""
is available
only 1/8 dividing is available
fosc/2
fosc/4
fosc/16
fosc/64
fs/2
fs/4
Timer 5 output
External clock
(standard 300 bps
2.5 MHz
UART (duplex)
clock synchronous
TXD0,RXD0
SBO1,SBI1,SBT1
-
(TXD0)
7 bits + 1stop
7 bits + 2stops
8 bits + 1stop
8 bits + 2stops
0 parity
1 parity
odd parity
even parity
-
fosc/2
fosc/4
fosc/16
fosc/64
fs/2
fs/4
Timer 5 output
Timer 4 output
300 kbps
to 38.4 kbps)
(timer 5 output)
Chapter 11 Serial Interface 0, 1
Serial interface 1
UART (duplex)
SC1TIRQ (on transmission
SC1TIRQ
completion)
SC1RIRQ (on reception
completion)
(SBO1, SBT1)
-
7 bits + 1stop
7 bits + 2stops
1 to 8 bits
8 bits + 1stop
8 bits + 2stops
-
-
only ""enable start condition""
is available
only 1/8 dividing is available
fosc/2
fosc/4
fosc/16
fosc/64
fs/2
fs/4
Timer 4 output
External clock
(standard 300 bps
2.5 MHz
(timer 4 output)
Overview
TXD1,RXD1
-
3 (TXD1)
0 parity
1 parity
odd parity
even parity
-
fosc/2
fosc/4
fosc/16
fosc/64
fs/2
fs/4
300 kbps
to 38.4 kbps)
XI - 3

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