Omron CS1G/H-CPUxxH Instructions Manual page 48

Instruction Functions
Instruction Symbol/Operand
Mnemonic
Code
DIFFERENTIATE
DOWN DIFD(014)
DIFD
!DIFD
B: Bit
014
SET
SET
@SET
%SET
!SET
B: Bit
!@SET
!%SET
RESET
RSET
@RSET
%RSET
!RSET
B: Bit
!@RSET
!%RSET
MULTIPLE BIT
SETA(530)
SET
SETA
@SETA
530
D: Beginning
word
N1: Beginning bit
N2: Number of
bits
MULTIPLE BIT
RESET RSTA(531)
RSTA
@RSTA
531
D: Beginning
word
N1: Beginning bit
N2: Number of
bits
SINGLE BIT SET
(CS1-H, CJ1-H, SETB(532)
CJ1M, or CS1D
only)
SETB
@SETB
!SETB
D: Word address
N: Bit number
DIFD(014) turns the designated bit ON for one cycle when the
execution condition goes from ON to OFF (falling edge).
B
Execution condition
Status of B
SET turns the operand bit ON when the execution condition is ON.
SET
B Execution condition
of SET
Status of B
RSET turns the operand bit OFF when the execution condition is ON.
RSET
B
Execution condition
of RSET
Status of B
SETA(530) turns ON the specified number of consecutive bits.
D
N1
N2
RSTA(531) turns OFF the specified number of consecutive bits.
D
N1
N2
SETB(532) turns ON the specified bit in the specified word when the exe-
cution condition is ON.
Unlike the SET instruction, SETB(532) can be used to set a bit in a DM or
D
EM word.
N
Function
One cycle
N2 bits are set to 1
(ON).
N2 bits are reset to 0
(OFF).
Section 2-2
Location Page
Execution
condition
Output 173
Required
Output 175
Required
Output 175
Required
Output 177
Required
Output 177
Required
Output 180
Required
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