Omron CS1G/H-CPUxxH Instructions Manual page 304

Sysmac cs series; sysmac cj series
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Data Movement Instructions
Description
S
Flags
Area
Holding Bit Area
Auxiliary Bit Area
Timer Area
Counter Area
DM Area
EM Area without bank
EM Area with bank
Indirect DM/EM
addresses in binary
Indirect DM/EM
addresses in BCD
Constants
Data Registers
Index Registers
Indirect addressing
using Index Registers
MOVL(498) transfers S+1 and S to D+1 and D. If S+1 and S are constants,
the value can be used for a data setting.
S+1
Bit status
not changed.
Name
Label
Error Flag
ER
Equals Flag
=
Negative Flag
N
S
H000 to H510
A000 to A958
T0000 to T4094
C0000 to C4094
D00000 to D32766
E00000 to E32766
En_00000 to En_32766
(n = 0 to C)
@ D00000 to @ D32767
@ E00000 to @ E32767
@ En_00000 to @ En_32767
(n = 0 to C)
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
#00000000 to #FFFFFFFF
(binary)
---
IR0 to IR15
,IR0 to ,IR15
–2048 to +2047, IR0 to –2048 to +2047, IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –) IR0 to, 1–(– –) IR5
D
Operation
OFF
ON if the contents of D+1 and D are 0000 0000 after exe-
cution.
OFF in all other cases.
ON if the leftmost bit of D+1 is 1 after execution.
OFF in all other cases.
Section 3-8
D
A448 to A958
---
D+1
283

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