Omron CS1G/H-CPUxxH Instructions Manual page 767

Interrupt Control Instructions
746
CJ1M CPU Unit Built-in Interrupt Inputs
Specifying I/O Interrupt Processing and Mask Processing
Operand
N Specify the interrupt input number.
6: Interrupt input 0
7: Interrupt input 1
8: Interrupt input 2
9: Interrupt input 3
S Interrupt mask.
0000 hex: Interrupt enabled (direct mode)
0001 hex: Interrupt masked (direct mode)
0002 hex: Decrementing counter started and interrupts enabled
0003 hex: Incrementing counter started and interrupts enabled
Note All interrupt inputs that have been detected will be cleared when the interrupt
mask is cleared.
The relationship between interrupt input numbers and interrupt task numbers
is shown in the following table.
Interrupt input number
Interrupt input 0
Interrupt input 1
Interrupt input 2
Interrupt input 3
Specifying I/O Interrupt Processing Rising/Falling Edge Designation
Operand
N
S
The relationship between interrupt input numbers and interrupt task numbers
is shown in the following table.
Interrupt input number
Interrupt input 0
Interrupt input 1
Interrupt input 2
Interrupt input 3
Note All interrupt inputs that have been detected will be cleared when the rising/fall-
ing edge designation is changed.
Contents
(counter mode)
(counter mode)
Interrupt task numbers
140
141
142
143
Specify the interrupt input number.
10: Interrupt input 0
11: Interrupt input 1
12: Interrupt input 2
13: Interrupt input 3
Specify either the rising or falling edge of the interrupt input sig-
nal.
0000 hex: Rising edge
0001 hex: Falling edge
Interrupt task numbers
140
141
142
143
Section 3-20
CIO 296000
CIO 296001
CIO 296002
CIO 296003
Contents
CIO 296000
CIO 296001
CIO 296002
CIO 296003