Omron CS1G/H-CPUxxH Instructions Manual page 206

Sequence Output Instructions
Description
Flags
Precautions
Example
Area
Index Registers
Indirect addressing using
Index Registers
When the execution condition is ON, OUTB(534) turns ON bit N of word D.
When the execution condition is OFF, OUTB(534) turns OFF bit N of word D.
15
D
Execution condition
Bit N of word D
If the immediate refreshing version is not used, the status of the execution
condition (power flow) is written to the specified bit in I/O memory. If the imme-
diate refreshing version is used, the status of the execution condition (power
flow) is written to the Basic Output Unit's output terminal as well as the output
bit in I/O memory.
OUTB(534) is supported by the CS1-H, CJ1-H, and CJ1M CPU Units only.
There are no flags affected by this instruction.
Immediate refreshing (!OUTB(534)) can be specified. An immediate refresh
instruction updates the status of the output terminal just after the instruction is
executed on an output bit allocated to a Basic Output Unit (but not for C200H
Group 2 Multi-point Output Units or Basic Output Units on Slave Racks), at
the same time as it writes the status of the execution condition (power flow) to
the specified output bit in I/O memory.
When OUTB(534) is programmed between IL(002) and ILC(003), the speci-
fied bit will be turned OFF if the program section is interlocked. (This is the
same as an OUT instruction in an interlocked program section.)
When a word is specified for the bit number (N), only bits 00 to 03 of N are
used. For example, if N contains FFFA Hex, OUTB(534) will control bit 10 of
word D.
000000
D
---
,IR0 to ,IR15
–2048 to +2047, IR0 to –2048 to +2047, IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –) IR0 to, –(– –) IR15
N
This bit is turned OFF.
ON
OFF
ON
OFF
OUTB
Bit 10 of D00000 is turned OFF
D00000
when CIO 000000 is OFF.
&10
Section 3-4
N
0
185