Omron CS1G/H-CPUxxH Instructions Manual page 769

Interrupt Control Instructions
Description
Note
Note
748
Area
Index Registers
Indirect addressing
using Index Registers
MSKS(690) controls I/O interrupts and scheduled interrupts. The value of N
identifies the interrupt.
Unit
CS1W-INT01 or 0 or 1
CJ1W-IN01
C200HS-INT01 0 to 3
CJ1M CPU Unit built- 6 to 9
in interrupt inputs
Unit
CS1W-INT01 or 2 or 3
CJ1W-IN01
CJ1M CPU Unit built- 10 to 13
in interrupt inputs
1. MSKS(690) can be used to enable a particular I/O interrupt task only in a
particular cycle and disable the task in other cycles.
2. Unit numbers are assigned to Interrupt Input Units in the order that they are
mounted, from left to right.
N = 4 or 5
Values 4 and 5 correspond to scheduled interrupts 2 and 3.
When N is 4 or 5, the content of S either disables the interrupt task (S=0000)
or sets the interrupt task with the specified time interval. The units for the
scheduled interrupt interval can be set in the PLC Setup to 10 ms, 1.0 ms, or
0.1 ms.
N = 14 or 15 (CJ1M CPU Unit Only)
When N is 14 or 15, the scheduled interrupt time specified in S is set for the
scheduled interrupt task specified by N, and the internal timer for the sched-
uled interrupt is reset. The time to the first interrupt for reset-starting is main-
tained.
1. The time unit for the scheduled interrupt is set in the PLC Setup.
2. Be sure that the time interval is longer than the time required to execute
the scheduled interrupt task.
3. For scheduled interrupts, MSKS(690) is used only to set the scheduled in-
terrupt interval and does not set the time to the first scheduled interrupt. To
accurately control the time to the first interrupt and the interrupt interval,
program CLI(691) to set the time to the first schedule interrupt just before
programming MSKS(690). If MSKS(690) is used to restart a schedule in-
terrupt for a CJ1M CPU Unit, however, the time to the first scheduled inter-
rupt will be accurate even if CLI(691) is not used.
A440 contains the maximum processing time for interrupt tasks and the right-
most byte of A441 contains the interrupt task number of the task with the long-
est processing time.
N
---
---
N
N corresponds to the interrupt input task. Bits 0
to 7 of S correspond to interrupt input numbers
in the corresponding Interrupt Unit. MSKS(690)
masks (disables) the interrupt input when the
corresponding bit is ON and unmasks (enables)
the interrupt input when the corresponding bit is
OFF.
N
N corresponds to the interrupt input task. S
specifies the rising or falling edge as the trigger.
(The default is the rising edge.)
Section 3-20
S
,IR0 to ,IR15
–2048 to +2047, IR0 to
–2048 to +2047, IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –) IR0 to, –(– –) IR15
Meaning
Meaning