Omron CS1G/H-CPUxxH Instructions Manual page 169

Sequence Input Instructions
Example
3-3-4 AND NOT: AND NOT
Purpose
Ladder Symbol
Variations
Note
Applicable Program Areas
Operand Specifications
148
Instruction
LD
AND
LD
AND
LD
AND NOT
OR LD
AND LD
OUT
Reverses the status of the specified operand bit and takes a logical AND with
the current execution condition.
Variations Creates ON Each Cycle AND NOT Result is ON
Creates ON Once for Upward Differentiation (See
note 1.)
Creates ON Once for Downward Differentiation (See
note 1.)
Immediate Refreshing Specification (See note 2.)
Combined Refreshes Input Bit and Creates ON Once for
Variations Upward Differentiation (See note 1.)
Refreshes Input Bit and Creates ON Once for
Downward Differentiation (See note 1.)
1. The following variations are supported by only the CS1-H, CJ1-H, or CJ1M
CPU Units: @AND NOT, %AND NOT, !@AND NOT, and !%AND NOT.
2. Immediate refleshing is not supported by the CS1D CPU Units.
Block program areas
OK OK
Area
CIO Area CIO 000000 to CIO 614315
Work Area W00000 to W51115
Holding Bit Area H00000 to H51115
Auxiliary Bit Area A00000 to A95915
Timer Area T0000 to T4095
Counter Area C0000 to C4095
Operand
000000
000001
000002
000003
000004
000005
---
---
000006
Step program areas Subroutines
OK
AND NOT bit operand
Section 3-3
AND NOT
@AND NOT
%AND NOT
!AND NOT
!@AND NOT
!%AND NOT
Interrupt tasks
OK