Omron CS1G/H-CPUxxH Instructions Manual page 165

Sequence Input Instructions
Example
3-3-2 LOAD NOT: LD NOT
Purpose
Ladder Symbol
Variations
Applicable Program Areas
144
Instruction
LD
LD
LD
AND
OR LD
AND LD
LD NOT
AND
OR LD
OUT
Indicates a logical start and creates an ON/OFF execution condition based on
the reverse of the ON/OFF status of the specified operand bit.
Variations Restarts Logic and Creates ON Each Cycle Operand
Bit is OFF
Restarts Logic and Creates ON Once for Upward
Differentiation (See note 1.)
Restarts Logic and Creates ON Once for Downward
Differentiation (See note 1.)
Immediate Refreshing Specification (See note 2.)
Combined Refreshes Input Bit, Restarts Logic, and Creates ON
Variations Once for Upward Differentiation (See note 1.)
Refreshes Input Bit, Restarts Logic, and Creates ON
Once for Downward Differentiation (See note 1.)
Note 1. The following variations are supported by only the CS1-H, CJ1-H, or CJ1M
CPU Units: @LD NOT, %LD NOT, !@LD NOT, and !%LD NOT.
2. Immediate refresing is not supported by the CS1D CPU Units.
Block program areas
OK
Operand
000000
OR LD
000001
000002
000003
---
---
000004
000005
---
000100
Bus bar
Step program areas
OK
Section 3-3
AND LD
OR LD
Starting point of block
LD NOT
@LD NOT
%LD NOT
!LD NOT
!@LD NOT
!%LD NOT
Subroutines Interrupt tasks
OK OK