Omron CS1G/H-CPUxxH Instructions Manual page 180

Sequence Input Instructions
3-3-10 Operation Timing for I/O Instructions
↑
↓
!
!↑
!↓
↑
↓
!
!↑
!↓
3-3-11 TR Bits
The following chart shows the differences in the timing of instruction opera-
tions for a program configured from LD and OUT.
Input
received
Input
received
Input
received
Input
received
Input
received
!
Input
! received
!
!
!
!
CPU
processing
Instruction execution
TR bits are used to temporarily retain the ON/OFF status of execution condi-
tions in a program when programming in mnemonic code. They are not used
when programming directly in ladder program form because the processing is
automatically executed by the Peripheral Device. The following diagram
shows a simple application using two TR bits.
Input
received
Input
received
Input
received
Input
received
Input received
Input
received
I/O refreshing
Section 3-3
159