Omron CS1G/H-CPUxxH Instructions Manual page 191

Sequence Output Instructions
170
S execution condition
R execution condition
Status of C
If S and R are ON simultaneously, the reset input takes precedence.
Set
Reset
Status of C
The set input (S) cannot be received while R is ON.
Set
Reset
Status of C
KEEP(011) has an immediate refreshing variation (!KEEP(011)). When an
external output bit has been specified for B in a !KEEP(011) instruction, any
changes to B will be refreshed when !KEEP(011) is executed and reflected
immediately in the output bit. (The changes will not be reflected immediately if
the bit is allocated to a Group-2 High-density I/O Unit, High-density Special I/
O Unit, or a Unit mounted in a SYSMAC BUS Remote I/O Slave Rack.)
KEEP(011) operates like the self-maintaining bit, but a self-maintaining bit
programmed with KEEP(011) requires one less instruction.
Self-maintaining bits programmed with KEEP(011) will maintain status even in
an interlock program section, unlike the self-maintaining bit programmed with-
out KEEP(011).
Section 3-4
ON
OFF
ON
OFF
ON
OFF