Omron CS1G/H-CPUxxH Instructions Manual page 251

Sysmac cs series; sysmac cj series
Hide thumbs Also See for CS1G/H-CPUxxH:
Table of Contents

Advertisement

Timer and Counter Instructions
Example
Timer input
CIO 000000
Reset bit
CIO 010008
Pause bit
CIO 010009
Max. PV = 9999
Timer SVs
SV 7
SV 1
SV 0
Completion Flags
230
When CIO 000000 is ON and the pause bit (CIO 010009) is OFF in the follow-
ing example, the timer will start operating when the reset bit (CIO 010009) is
turned from ON to OFF. The timer's PV will begin timing up from 0000.
The eight SVs in D00200 through D00207 are compared to the PV and the
corresponding Completion Flags (CIO 010000 through CIO 010007) are
turned on when the SV ≤ PV.
D1: 0100CH
Timer PV
D2: D00100
Timer SVs
S: D00200
S+1: D00201
S+2: D00202
S+3: D00203
S+4: D00204
S+5: D00205
S+6: D00206
S+7: D00207
PV maintained.
Completion Flags
Reset bit
Pause bit
(Incrementing)
Corresponding completion
flag ON when SV ≤ PV.
Timer input must remain ON
while the timer is timing.
Timing resumes.
Section 3-6

Advertisement

Table of Contents
loading

Table of Contents