Omron CS1G/H-CPUxxH Instructions Manual page 188

Sequence Output Instructions
Description
Flags
Precautions
Example
3-4-2 OUTPUT NOT: OUT NOT
Purpose
Ladder Symbol
Variations
Applicable Program Areas
Area
Index Registers
Indirect addressing
using Index Registers
If there is no immediate refreshing specification, the status of the execution
condition (power flow) is written to the specified bit in I/O memory. If there is
an immediate refreshing specification, the status of the execution condition
(power flow) is also written to the Basic Output Unit's output terminal in addi-
tion to the output bit in I/O memory.
There are no flags affected by this instruction.
Immediate refreshing (!) can be specified for OUT and OUT NOT. An immedi-
ate refresh instruction updates the status of the output terminal just after the
instruction is executed for the Basic Output Unit (but not for Basic Output
Units on Slave Racks or for C200H Group 2 Multi-point Input Units), at the
same time as it writes the status of the execution condition (power flow) to the
specified output bit in I/O memory.
Instruction
LD
OUT
OUT NOT
Reverses the result (execution condition) of the logical processing, and out-
puts it to the specified bit.
Variations Executed Each Cycle for ON Condition
Executed Once for Upward Differentiation
Executed Once for Downward Differentiation Not supported.
Immediate Refreshing Specification (See note.)
Note Immediate refreshing is not supported by the CS1D CPU Units.
Block program areas
Not allowed
OUT bit operand
---
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to ,IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Operand
000000
000001
000002
Step program areas Subroutines
OK OK
Section 3-4
OUT NOT
Not supported.
!OUT NOT
Interrupt tasks
OK
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